Agenda：Online Event

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Join the TSMC Open Innovation Platform Ecosystem Forum Japan 2024 and learn from OIP partners how to leverage their technology for your design challenges!

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Date: Monday, November 18, 2024

Plenary Session
Welcome & Ecosystem Pavilion
Opening Remarks
TSMC Keynote & Guest Speech

Included All In-Person Papers

HPC & 3DFabric Track

Realizing benefits of Backside Power and Clock on TSMC A16 technology node

Synopsys

Thermal modeling of backside power delivery structure –- a N2 process case practice

Ansys

Leveraging TSMC’s CoWoS Interposer and Synopsys’ SLM IP to Monitor, Test, and Repair Multi-Die Designs

Synopsys / TSMC

Ansys-Synopsys-TSMC Solve the 3DIC Multiphysics Challenges

Synopsys / Ansys

Die-to-Die Physical-Aware Interconnect Testing Using 3Dblox For Reduced Manufacturing Test Cost

Siemens EDA / TSMC

HBM3/HBM3E Implementation Challenges When Integrating Memory Controllers with Physical Layer Solutions, and How to Overcome them

Rambus / Cadence

TSMC A16 backside power delivery EMIR enablement with an innovative standard cell power modeling method

Ansys

Addressing 3DIC Design Reliability Challenges with a Cutting-Edge Mechanical Stress Modeling and Simulation Approach

Cadence

Thermal challenges and an innovative solution for 3D heterogeneous integration of Co-Packaged Optics

ANSYS INC.

Insights into the Synopsys-TSMC UCIe IP on N5 and CoWoS Test Chip

Synopsys
Mobile, IoT & Automotive Track

Using Quantus Insight for Intelligent Debugging, Optimization, and Signoff Closure

Cadence / CelestialAI

2.5D/3DIC ESD Reliability Analysis

Ansys Inc

AI Driven Layout Optimization For T-Coil Matching Networks

Ansys / AMD

Innovative ESD Protection Solutions at 3nm FinFET: A Partnership Between Sofics and Siemens EDA

Sofics / Siemens EDA

AI-based RF design synthesis flow

Synopsys

Mastering the Timing Closure Maze for Enhanced Productivity and Efficiency

Cadence / Intel

Groundbreaking SRAM Repair Toolset: Pre-integrated Siemens Tessent MBIST with eMemory’s NeoFuse OTP

eMemory / Siemens EDA

Enabling SoC Scaling to GAA Processes with Synopsys Foundation IP

Synopsys

Leveraging AI to correctly identify critical corners for statistical .lib characterization on automotive cell libraries

Siemens EDA / Infineon Technologies

LLM Based Physical Verification Runset Generator

Synopsys

*The agenda is subject to change by TSMC.

Legal Notice

TSMC is not responsible for the content, accuracy, or reliability of any of the presentations at the TSMC Open Innovation Platform Ecosystem Forum. Furthermore, posting the presentation abstracts on TSMC's corporate website does not constitute an endorsement of the content of those presentations by TSMC. Any liability arising from the contents of any of the presentations is the responsibility of the presenter itself, and not TSMC.

The views expressed in the presentations made at this event are those of the speaker and are not necessarily those of TSMC.