Agenda：Europe Additional Event

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Join the 2024 TSMC Open Innovation Platform Ecosystem Forum and learn from OIP partners how to leverage their technology for your design challenges!

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Date: Thursday, December 5, 2024

Plenary Session
Welcome & Ecosystem Pavilion
Opening Remarks
TSMC Keynote

Included All In-Person Papers

3DFabric & 3Dblox Track

HBM3/HBM3E Implementation Challenges When Integrating Memory Controllers with Physical Layer Solutions, and How to Overcome them

Rambus / Cadence

Leveraging TSMC’s CoWoS Interposer and Synopsys’ SLM IP to Monitor, Test, and Repair Multi-Die Designs

Synopsys / TSMC

An innovative mechanical stress modeling and simulation solution with TSMC 3Dblox standard

Ansys

Unveiling the Potential of PCIe over Optical Fiber

Alphawave Semi

Thermal challenges and an innovative solution for 3D heterogeneous integration of Co-Packaged Optics

ANSYS INC.

Insights into the Synopsys-TSMC UCIe IP on N5 and CoWoS Test Chip

Synopsys
HPC & Mobile Track

AWS cloud technologies improves productivity for Calibre® PERC™ reliability verification workloads

Siemens / Amazon Web Services

Using Quantus Insight for Intelligent Debugging, Optimization, and Signoff Closure

Cadence / CelestialAI

Chip Design - Cloud and Efficiency

Google

Revolutionizing RC Parasitic Extraction: The Power of StarRC Hybrid Extraction

Synopsys / TSMC

Soft Error Simulation Tool to Create an N3E SER Library

IROC Technologies

Leveraging AI to accelerate debug with Calibre Design Solutions

Siemens EDA

Mastering the Timing Closure Maze for Enhanced Productivity and Efficiency

Cadence / Intel

High Performance SiFive RISC-V N3E Cores enablement using Synopsys QIK flow

Synopsys / SiFive

Enabling SoC Scaling to GAA Processes with Synopsys Foundation IP

Synopsys
Automotive, IoT & RF Track

AI-Driven Analog Design Migration Solution Tuned for TSMC Technology Platforms

Synopsys

Advanced GPIO Solutions for Radiation-Hardened Applications: A Decade of Collaboration Between Sofics and CERN

Sofics / CERN

MIPS Multi-threading Multi-core RISC-V Application Processor Ready for Automotive-Grade Silicon

MIPS

Innovative ESD Protection Solutions at 3nm FinFET: A Partnership Between Sofics and Siemens EDA

Sofics / Siemens EDA

Developing Next-Gen Battery Charging Technology Partnering with TSMC and Synopsys for a Sustainable Energy Future

Synopsys / Iontra

*The agenda is subject to change by TSMC.

Legal Notice

TSMC is not responsible for the content, accuracy, or reliability of any of the presentations at the TSMC Open Innovation Platform Ecosystem Forum. Furthermore, posting the presentation abstracts on TSMC's corporate website does not constitute an endorsement of the content of those presentations by TSMC. Any liability arising from the contents of any of the presentations is the responsibility of the presenter itself, and not TSMC.

The views expressed in the presentations made at this event are those of the speaker and are not necessarily those of TSMC.