Agenda:Europe In-Person Event

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Join the 2024 TSMC Open Innovation Platform Ecosystem Forum and learn from OIP partners how to leverage their technology for your design challenges!

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Date: Tuesday, November 19, 2024

Time Plenary Session
08:30 - 09:30 Registration & Ecosystem Pavilion
09:30 - 09:45 Welcome Remarks
09:45 - 10:30 TSMC Keynote
- Guest Speaker: Ricardo de Sa Earp, Executive Vice-President of the General-Purpose Microcontrollers Sub-Group, STMicroelectronics
- Guest Speaker: Jan-Philipp Gehrmann, Vice President of Automotive System Marketing, NXP
10:30 – 11:00 Coffee Break & Ecosystem Pavilion
TSMC Technical Talks
11:00 – 11:30 3Dblox 2024: Maximize 3DIC Design Productivity

TSMC

Energy efficient N2P and A16 SPR Technology Enablement

TSMC

AI-powered EDA Solutions for Design PPA, QoR and Productivity Enhancement

TSMC

OIP Partner Technical Talks
3DFabric & 3Dblox Track HPC & Mobile Track Automotive, IoT & RF Track
11:30 – 11:50 Effective methods to reuse and automate bump creation for chiplets in 3DIC designs

Synopsys / AMD

Leveraging AI/ML as the next leap to custom design automation

Cadence / Renesas

Analog and RF interfaces in future nanometer CMOS

University of Twente

11:50 – 12:10 3DIC Physical Implementation and SoIC-X Silicon Testing Results

GUC

Realizing benefits of Backside Power and Clock on TSMC A16 technology node

Synopsys

Realtime Safety Monitoring for Automotive Electronics based on Deep Data

proteanTecs

12:10 – 12:30 Routing of Multi-Chiplet TSMC 3DFabric technologies

Cadence / AMD

A comprehensive IP validation methodology for Microsoft’s AI and high-performance compute chips

Siemens EDA / Microsoft

A library-focused approach to standard cell IP evaluation and selection for automotive ICs

Siemens EDA / Infineon Technologies

12:30 – 13:30 Lunch & Ecosystem Pavilion
13:30 – 13:50 Efficient 3D Chiplet Stacking Using TSMC SoIC Technology

Alchip / Synopsys

Thermal modeling of backside power delivery structure –- a N2 process case practice

Ansys

In memory compute in 16 nm finFET for energy efficient neural network acceleration.

KU Leuven MICAS

13:50 – 14:10 Distributed and GPU-accelerated 3D EM Simulations for IC and 3DIC Silicon Photonics Applications with Peakview

Lorentz Solution / NVIDIA

Low-Power Communication IC Design Verified by AI-Powered Simulation Flow

Siemens EDA / THine Electronics

Enabling a Battery-Free IoT Future: Sofics and ONiO Collaboration on Ultra-Low Leakage ESD Protection

Sofics / ONiO

14:10 – 14:30 Architecting next generations Terabit AI networks with Industry’s First Multi-Protocol I/O Connectivity Chiplet

Alphawave Semi / Arm

Groundbreaking SRAM Repair Toolset: Pre-integrated Siemens Tessent MBIST with eMemory’s NeoFuse OTP

eMemory / Siemens EDA

New approach that targets EM/IR hotspot analysis and fixing with mPower and Calibre DesignEnhancer

Siemens EDA

14:30 – 14:50 Multi-die design for TSMC COUPE with unified electronic and photonic design solutions

Synopsys / Ansys

AI Driven Layout Optimization For T-Coil Matching Networks

Ansys / AMD

AI-based RF design synthesis flow

Synopsys

14:50 – 15:20 Coffee Break & Ecosystem Pavilion
15:20 – 15:40 Ansys-Synopsys-TSMC Solve the 3DIC Multiphysics Challenges

Synopsys / Ansys

On-Die High Accuracy Thermal and Voltage Sensing to lower system cost and reliability

Analog Bits

Leveraging AI to correctly identify critical corners for statistical .lib characterization on automotive cell libraries

Siemens EDA / Infineon Technologies

15:40 – 16:00 GDDR Memory for High-Performance AI Inference

Cadence / Rambus

New RISC-V Solutions for Infrastructure and Datacenters

SiFive

Ultra-Low-Power AI-Enabled Keyword Spotting Chips for Edge IoT

Delft University of Technology / Aalto University (Finland) / Leiden University (Netherlands)

16:00 – 17:00 Networking and Reception

*The agenda is subject to change by TSMC.