 |
Mobile & Automotive Track 16:00 – 16:30 |
 |
Achieving Ultra Low Power Designs on TSMC Advanced Nodes using Synopsys Foundation IP
Synopsys
|
 |
Abstract
Demand for SoCs with extremely low power consumption and energy efficiency continues to rise in the semiconductor industry, whether for IoT, mobile, bitcoin mining, HPC, automotive sensors, or AI. As the technology scales down further and system complexity increases, SoC designers need memories and logic libraries that consume very little power and are optimized to minimize dynamic and leakage power on advanced nodes. And, of course, all of this must be achieved without impacting performance or area.
This presentation highlights how Synopsys Foundation IP solutions, including Embedded Memory, Logic Library, and GPIO products for TSMC N12e, N5, N4P, and N3E/P processes, enable SoC designers to meet their low power and ultra-low power design requirements while achieving optimal performance and area. Synopsys Foundation IP solutions for TSMC advanced nodes are specifically architected and optimized to perform at low voltages and can employ various design-level techniques for ultra-low power enablement of SoCs required for these applications. |
|
Legal Notice
TSMC is not responsible for the content, accuracy, or reliability of any of the presentations at the TSMC Open Innovation Platform Ecosystem Forum. Furthermore, posting the presentation abstracts on TSMC's corporate website does not constitute an endorsement of the content of those presentations by TSMC. Any liability arising from the contents of any of the presentations is the responsibility of the presenter itself, and not TSMC. |
|