Mobile & Automotive Track   11:30 – 12:00

Demonstrating Technology PPA Entitlement with TSMC’s N2 Technology on HPC Design Using Synopsys Fusion Compiler

TSMC’s first generation Nanosheet technology, N2, presents significant opportunity for achieving performance-per-Watt targets. Extracting maximum PPA benefit out of this technology requires careful handling of special cell structures, such as performance oriented merged OD cells (MOD).

This presentation will talk about achievement of PPA scaling targets with N2 on a million+ instance high-performance customer design. We will show how key EDA technologies for cell selection and wire optimization, design expertise, and close collaboration with TSMC were critical to demonstrating node entitlement.

This will illustrate how shift left DTCO collaboration to include customer design and methodologies can help prioritize high value projects and unlock the full potential of a new technology node. This will also introduce wire optimization technology.

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